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SoftIron

Design Verification Lead

Engineering · Newark , California
Department Engineering
Employment Type Full-Time
Minimum Experience Mid-level

Design Verification Lead

Responsibilities

You will be responsible for developing all simulation and verification strategies and methodologies for complex FPGA designs utilizing industry best practices for use in multiple projects within the company.  You will work in close collaboration with FPGA, hardware, and software engineers throughout the design, test, and integration phases to ensure that FPGA designs are correctly verified and tested at the simulation/verification level.  

Requirements

• 5+ years of experience in common simulation and verification frameworks 

• Understanding of how to design and implement test benches, develop test plans, write test   cases and run regressions to verify designs 

• Familiarity with at least one common simulation tools like VCS or Modelsim

• Experience with SystemVerilog, SystemC, C, and at least one scripting language (Python, Perl) 

• Ability to also help debug actual hardware on a lab bench a major plus 

• Experience creating and using verification components and environments in a standard verification methodology such as VMM, OVM, or UVM

• Strong analytical thinking skills, excellent attention to detail, and good coding skills are required

• Troubleshooting and debugging skills

• Self driven, motivated, results oriented 

• Experience with Altera/Intel FPGAs a plus 

Location: Newark, California – this is not a remote position.  Must be authorized to work in the U.S. for any employer.

Softiron Benefits: Medical, Dental and Vision. Paid time off. Office Lunches.

We are an equal opportunity employer. We value diversity and inclusion. We want to see you grow!

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  • Location
    Newark , California
  • Department
    Engineering
  • Employment Type
    Full-Time
  • Minimum Experience
    Mid-level